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High-Speed, Dual-Phase Driver
with Integrated Boost Diodes
Table 2. Components for Figure 4, 300kHz,
30A/Phase Typical Application Circuit
Avoiding dV/dt-Induced
Low-Side MOSFET Turn-On
At high input voltages, fast turn-on of the high-side
+ M x Q G _ TOTAL _ LS ×
] × V PV _ + V VCC VCC
× I
DESIGNATION
C1
C2
C3
C4, C5
C6, C7, C8
L1, L2
Q1
Q2
Q3
Q4
DESCRIPTION
2 x 10μF ±20%, X7R
25V capacitor
12103D106MAT2W
2 x 10μF ±20%, X7R
25V capacitor
12103D106MAT2W
2.2μF ±20%, 10V X5R
capacitor
GRM39X5R225K10
0.22μF ±20%, 10V
X7R capacitors
GRM39X7R224K10
2700μF ±20%, 6.3V
capacitors
MFZ series, 7m Ω max
ESR
T50183, 250nH
inductors at 35A
±20%, 0.68m Ω DCR
2 x HAT2168, 8m Ω ,
30V MOSFET
2 x HAT2164H, 3m Ω ,
30V MOSFET
2 x HAT2168, 8m Ω ,
30V MOSFET
2 x HAT2164H, 3m Ω ,
30V MOSFET
MANUFACTURER
AVX
AVX
Murata
Murata
Rubycon
Falco Electronics
Renesas
Renesas
Renesas
Renesas
MOSFET could momentarily turn on the low-side MOS-
FET due to the high dV/dt appearing at the drain of the
low-side MOSFET. The high dV/dt causes a current flow
through the Miller capacitance (C RSS ) and the input
capacitance (C ISS ) of the low-side MOSFET. Improper
selection of the low-side MOSFET that has a high ratio
of C RSS /C ISS makes the problem more severe. To avoid
the problem, give special attention to the ratio of
C RSS /C ISS when selecting the low-side MOSFET.
Adding a resistor between BST_ and the BST_ capaci-
tor slows the high-side MOSFET turn-on. Adding a
capacitor from the gate to the source of the high-side
MOSFET has the same effect. However, both methods
are at the expense of increasing the switching losses.
Applications Information
Power Dissipation
Power dissipation in the IC package comes mainly from
switching the MOSFETs. Therefore, it is a function of
both switching frequency and the total gate charge of
the selected MOSFETs. The total power dissipation
when both drivers are switching is given by:
P IC = 2 × f S × [ N × Q G _ TOTAL _ HS ×
R HS
R HS + ( R G _ HS / N )
R LS
R LS + ( R G _ LS / M )
where f S is the switching frequency, Q G_TOTAL_HS is
Setting the Dead Time
Connect DLY to VL_ for the default delay time, typically
14ns. To increase the delay between the low-side
MOSFET drive turn-off and the high-side MOSFET turn-
on, connect a resistor from DLY to PGND1. See the
Typical Operating Characteristics section for a plot of
the delay time vs. resistor value. The equation for this
resistor is:
t DLY = 14μs + (1pF) x R DLY
the total gate charge of the selected high-side MOS-
FET, Q G_TOTAL_LS is the total gate charge of the
selected low-side MOSFET, N is the total number of the
high-side MOSFETs in parallel, M is the total number of
the low-side MOSFETs in parallel, V VL is the voltage at
VL, R HS is the on-resistance of the high-side MOSFET,
and R G_LS is the gate resistance of the selected low-
side MOSFETs.
8
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